Posts

Showing posts with the label transistors

Foundry-compatible routes achieving ultra-low resistance Ohmic contacts enable sub-1nm 2D transistor scaling

https://www.eurekalert.org/news-releases/1137988 "2D semiconductor-metal interfaces exhibit Fermi-level pinning/ high contact resistance, degrading dichalcogenides' carrier mobility, overcome establishing low-energy semimetallic contacts (bismuth/antimony)/ van der Waals integration forming Ohmic Schottky contacts without damaging atomic monolayers... <100 Ω μm contact resistance, maintaining thermal stability during standard back-end-of-line integration... field-effect transistors"

Diamond nitrogen-vacancy quantum sensing microscope non-destructively maps magnetic fields/ internal current paths in sub-2nm gates

https://www.eurekalert.org/news-releases/1136831 "metrology tool for semiconductor foundries debugging yield/ current leakage in gate-all-around (eliminates current leakage/ short-channel effect) 2-layer chromium sulfur bromide van der Waals magnetic spin transistors, which combine logic switching/ non-volatile memory in 1 crystal... leverages space-charge-limited conduction dynamics, achieving 1M% electrical on/off ratio, 3K% magnetic on/off ratio... instant-on processors bypassing von Neumann memory bottleneck without interface losses"

Controlling nanoscale structural gaps in 2D material layers is a powerful tuning mechanism for microelectronics/ non-volatile memory

https://phys.org/news/2026-07-nanoscale-gaps-reveal-atom-thin.html "maps design rules for atomic-scale, gap-controlled 2D materials... when 2D materials placed on slightly uneven metal electrodes, nanoscale gaps form at interface, altering distance electrons must cross... these gaps have greater impact on quantum tunneling/ unwanted electrical leakage creation than material's properties... practical guidance for engineers to control leakage currents, paving the way for smaller, more energy-efficient computer chips and ultra-thin memory devices"

Volatile surface coordination prevents non-toxic tin-based perovskite transistors exposed to air/ heat stress from degrading/ oxidizing

https://www.eurekalert.org/news-releases/1135033 "p-type transistor... Volatile Surface Reconstruction: cesium-tin-iodide semiconductor layer potassium acetate treated forcing unstable defect-forming surface tin ion conversion to volatile compound evaporating under mild heat... simultaneously, vacated surface gaps filled with potassium iodide, forming self-protective passivation shield against ambient oxygen/ moisture... >50 cm^2/V field-effect hole mobility, >100 mn on/off current ratio, structurally stable at 100°}for >month... commercialization"

Flared, dog-bone layout for sub-nm 2D transistors drastically lowers electrical contact resistance that limits performance at atomic scales

https://techxplore.com/news/2026-06-dog-bone-2d-nanoribbon-transistors.html "atomic scale rectangular nanoribbon transistors exhibit contact resistance where metal leads meet thin channel, degrading electrical current limiting performance... overcome widening contact regions at ends while keeping central channel ultra-narrow... maintains high-velocity carrier injection/ energy efficiency as post-silicon 2D semiconductor dimensions continue scaling downward under Moore's Law... enables carrying significantly higher current densities without experiencing typical miniaturization bottlenecks"

IBM introduces world's first sub-1 nm chip, engineered at 0.7-nm, exhibiting faster processing/ reduce power requirements

https://techxplore.com/news/2026-06-ibm-unveils-nanometer-chip-tech.html "nanostack 3D transistor architecture vertically layers/ staggers components... packs nearly 100 billion transistors onto fingernail-sized silicon, roughly doubling 2-nm node density... up to a 50 percent boost in computing performance or a 70 percent reduction in energy consumption... while the technology is currently an experimental research platform, IBM expects to see a viable path toward commercial mass production within the next five years"

Neuromorphic chip uses surface acoustic waves instead of electrical currents to handle complex matrix arithmetic at fraction of power

https://techxplore.com/news/2026-06-power-kind-chip-human-brain.html "bypasses thermodynamic limits... microscopic sound vibrations controlling electrical charges movement within 2D materials... sound waves shift whether electrons/ holes dominate material's channel, reversing electrical current direction... multi-bit memory element prototypes vastly boost data storage density within a single cell... created the first surface acoustic wave -controlled artificial synapses, paving the way for highly efficient, biologically plausible AI hardware with expanded dynamic range... edge AI" Related: Reconfigurable AI device preserves long-term memory while acoustic waves reset short-term signals https://techxplore.com/news/2026-07-reconfigurable-ai-device-term-memory.html

P-type transistors fabricated using monolayer WSe₂ match n-type electron mobility, achieving perfectly balanced, ultra-thin CMOS chips

https://techxplore.com/news/2026-06-monolayer-wse-high-p-transistors.html "p-type 2D transistor development constrained by silicon scaling limits, including severe contact resistance/ lack of reliable chemical doping strategies, overcome utilizing monolayer tungsten diselenide integrated with interfacial doping technique optimizing electrical transport... minimizes structural contact resistance while boosting hole carrier mobility to match n-type thresholds, paving a clear engineering path for sub-nanometer logic chips that optimally balance processing speed with low power consumption"

Wolfspeed's 1200 & 750V silicon carbide MOSFETs: up to 27% reduced on-resistance/ 200°C increased continuous junction temperature

https://www.semiconductor-today.com/news_items/2026/jun/wolfspeed-090626.shtml "reducing conduction losses while raising heat thresholds optimizes mass-market EV drivetrain/ industrial power grid efficiency... enables more compact traction inverters (5x5 mm footprint), maximized current capability, improved durability (continuous junction temperatures up to 200°C while lowering overall switching losses)... world's first fully automated facility dedicated to cooking and processing larger 200 mm silicon carbide wafers using existing fabrication toolsets"

Single transistor simultaneously calculates logic operations, stores data for >100,000 seconds, emits high purity/ aperture ratio light

https://www.eurekalert.org/news-releases/1131038 "multi-functional organic transistor coupled with ultra-thin, charge-trapping polymer electret layer consolidates computing, non-volatile data retention, visual pixel illumination into single device... highly efficient/ ultra-compact: wearable electronics/ medical devices, advanced neuromorphic visual computing systems, flexible smart displays, neuromorphic hardware"

Localized thick-contact 2D tellurium semiconductors yield 50X drop in contact resistance and 17X increase in on-state current

https://www.eurekalert.org/news-releases/1130440 "ultra-dense, sub-2nm transistors replacing silicon. making thin enough to suppress leakage current enlarges energy barrier, severely restricting electron flow... overcome using Raised Source and Drain structure, depositing additional tellurium to selectively thicken only areas directly in contact with metal electrodes... implemented using standard, low temperature large-area sputtering deposition... highly scalable/ commercially viable platform accelerating high-performance 3D microchip production"

A new way to move heat directs/ pumps it away from hot zones at atomic scale, vastly improving solid-state thermal management

https://www.eurekalert.org/news-releases/1129696 "thermal dissipation limited by chaotic photon scattering keeping microprocessors from running at sustained higher speeds, overcome using artificial atomic lattice synchronizing tailored structural vibrations into directed, fluid-like channels, with coordinated movement increases heat transport velocity, allowing up to 10X faster flow than in standard silicon substrates... advanced thermal management layer manufacturing... next-generation microchips and electric vehicle systems"

New class of memory-preserving transistors break past Boltzmann limit, drastically lowering voltage required to switch digital states

https://phys.org/news/2026-05-memory-transistors-bypass-boltzmann-limit.html "bypasses rule restricting energy efficiency/ down-scaling silicon chips, which at room temperature require a minimum voltage change to switch digital states due to thermal properties of electrons, forcing use of higher voltages... attempts to bypass relied on complex, material-specific ferroelectric layers/ quantum tunneling, overcome utilizing intrinsic non-equilibrium charge dynamics. enabling sub-thermal switching... microchip scaling, highly efficient, in-memory non-von Neumann high-density computing"

Printing 3.6-nm-thick gallium oxide skin between metal electrodes/ 2D tungsten disulfide semiconductor achieves record electron mobility

https://www.eurekalert.org/news-releases/1127492 "nearly 296 cm^2/Vs... metal touching 2D sheet creates a massive resistance unless use more voltage, but generates wasted heat, overcome using 3.6 nm gallium oxide layer thick enough to be robust but electrically conductive (3.7 meV electrical barrier, 2 orders magnitude lower) since packed with oxygen vacancies acting as stepping stones... room-temperature liquid metal printing on silicon, low voltage/ high speed, scalable: >30 device array on single chip stable >3 months in normal air/ no protective packaging"

Mechanochemistry synthesizes complex conductive organic molecules, like acenes, more efficiently than solution-based chemistry

https://phys.org/news/2026-05-mechanochemistry-synthesis-molecules.html "solubility/ stability issues in organic electronics utilizing conductive molecules such as large polycyclic aromatic hydrocarbons: tend to clump/ degrade before reaction complete, overcome using high-speed ball milling breaking chemical bonds forcing reactions in solid state in fraction of the time/ higher yields, allowing longer chains of fused benzene rings... results in fewer side products/ easier purification/ lower costs... scalable semiconductor industrial manufacturing for: OLEDs, organic PV, flexible transistors"

Lithium intercalation triggers phase transitions, enabling scaling 2D dichalcogenides for high-performance flexible thermoelectrics

https://www.eurekalert.org/news-releases/1125299 "insert lithium ions between 2D materials' atomic layers... adjusting lithium amount dictates material's properties... lithium ions act as chemical wedge, weakening bonds between layers so can be easily separated into individual sheets in liquid solution... high electrical conductivity/ low thermal conductivity for efficient energy conversion... thin/ flexible for wearable device/ curved surface integration... industrial-scale 2D material, such as molybdenum disulfide, printing/ coating, maintaining structural integrity" Related: Unveiling the structural evolution of SnX (X = S, Se, Te) for advanced lithium storage https://www.eurekalert.org/news-releases/1126061

Hybrid material is either crystal (ordered) or amorphous solid (chaotic) depending entirely on direction from which material is viewed

https://phys.org/news/2026-03-chaos-layered-material-disorder-coexist.html "amorphous in 2 dimensions but crystalline in 3rd, allowing electrical conductivity or thermal resistance tuning, so behaves differently depending on current or heat direction... boundary between order/ chaos is a spectrum, many in-between materials misclassified because only analyzed from 1 perspective... chips transmitting data quickly in 1 direction/ insulating against heat in another, ion transport optimization in battery membranes using ordered vertical channels while maintaining stable amorphous structure"

Overcoming high resistance at metal electrode/ perovskite semiconductor interface for more reliable, faster, lower power devices

https://phys.org/news/2026-03-nanoscale-bottleneck-gen-electronics.html "impurity doping to improve conductivity fails because perovskites chemically sensitive/ physically soft, overcome: placing metal electrode on perovskite surface using van der Waals method preventing physical damage, apply mild heat to silver which diffuses slightly into surface, UV converts silver into silver oxide nanoclusters acting as electron acceptors creating p-doped region at 25 (reduced from 250) nm interface... electrons pass via Fowler–Nordheim quantum tunneling, not thermionic emission" Related: New microporous aerogel uses van der Waals forces for flexible, moldable shaping https://phys.org/news/2026-04-microporous-aerogel-van-der-waals.html Gas-solid van der Waals interactions drive evolution of surface nanostructures https://www.eurekalert.org/news-releases/1133384

Rice University method identifies hidden defects in a 2D hexagonal boron nitride insulator widely used in transistors/ quantum devices

https://www.eurekalert.org/news-releases/1117992 "invisible defects can cause stacking faults/ misalignments acting as charge traps weakening insulation, causing devices to leak electricity/ fail at lower voltages (faults form more readily in thicker flakes)... made visible using cathodoluminescence spectroscopy where electron beam makes material emit light, revealing hidden faults as bright, narrow lines in deep UV spectrum to better: predict device reliability/ spot these defects before they undermine device... ultrathin heterostructure electronics"

Stacking graphene/ hexagonal boron nitride layers in moiré pattern enables ferroelectric transistor to store 3,024 polarization states

https://techxplore.com/news/2026-02-atom-thin-ferroelectric-transistor-polarization.html "2 orders magnitude more memory states for more granular synaptic connection strengths in neuromorphic AI... transistor few atoms thick, stable >100K seconds even at room temperature, 93% accurate running image recognition AI algorithm, durable, fast switching... energy efficient, non-volatile... mechanical exfoliation, then dry-transfer stacking without solvents... applying DC voltage pulses/ gate voltages for on-demand modulation within the moiré potential. scale to wafer-size production" Related: Strong correlations and superconductivity observed in a supermoiré lattice https://phys.org/news/2026-02-strong-superconductivity-supermoir-lattice.html