TSMC working towards a future with trillion-transistor chips, 1nm-class manufacturing

https://www.techspot.com/news/101364-tsmc-working-towards-future-trillion-transistor-chips-1nm.html

"multiple 3D-stacked collections of chiplet designs (3D Hetero Integration)... CoWoS, InFO and SoIC packaging technologies... PowerVia backside power delivery allows higher logic densities, higher boost clock speeds, lower power leakage, energy-efficient... significant cost advantages... N3P mass production in 2nd half 2024,, start 2nm production by the end of 2025 move onto 1.4nm A14 process in 2028, and producing 200 billion monolithic 1nm transistors by 2030"