Voltage/ strain engineering increases charge carrier mobility of 2D molybdenum disulfide transistors integrated into silicon substrates

https://greenzrestaurants.ca/11/30/2024/rooyse/lVr118056JdM.html

"CMOS-compatible approach... silicon nitride coating semiconductor (both 2D) creates voltage/ stress precisely tuned/ deposited at relatively low temperatures, creating transistors... enabled increased 2D MoS performance, also reducing transistor channels/ contacts... smaller/ better-performing 2D semiconductor-based transistors... also applicable to other 2D semiconductors... future: extending this approach to p type 2D transistors (as opposed to the n-type devices used in this study)"