Novel architecture can reduce noise-induced jitters in digital technology

https://techxplore.com/news/2023-02-architecture-noise-induced-jitters-digital-technology.html

"non-uniform oversampling phase-locked loop (OSPPL) to extend loop bandwidth and improve jitter performance of high-frequency digital signals...increase the loop bandwidth by 60 times providing low-jitter, 2.4 GHz fractional-N PLL using 32 kHz reference... 200 kHz loop bandwidth with 4.95 ps jitter... efficiently consumes only 3.8 mW power... can be integrated with CMOS technologies making it more economic for electronic devices"